Cmos structure including dual metal containing composite gates

A method for fabricating a CMOS structure comprising:

• forming over a first semiconductor substrate region having a first polarity within a semiconductor substrate a first gate dielectric and an overlying first gate electrode comprising a first metal containing material layer and a first silicon containing material layer located upon the first metal containing material layer;
• forming over a laterally separated second semiconductor substrate region having a second polarity different than the first polarity within the semiconductor substrate a second gate dielectric and an overlying second gate electrode laterally separated from the first gate electrode and comprising a second metal containing material layer of a composition that is different than the first metal containing material layer and a second silicon containing material layer located upon the second metal containing material layer;
• and
• forming into the first semiconductor substrate region and the second semiconductor substrate region a first pair of source/drain regions separated by the first gate electrode and a second pair of source/drain regions separated by the second gate electrode, where the first silicon containing material layer has a composition different than the first semiconductor substrate region and the second silicon containing material layer has a composition different than the second semiconductor substrate region.