Integrated circuit system employing stress-engineered spacers
AssigneesChartered Semiconductor Manufacturing Ltd., International Business Machines Corporation, Samsung Corporation
InventorsJae Gon Lee, Jong Ho Yang, Victor Chan, Jun Jung Kim
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Abstract
An integrated circuit system that includes: providing a substrate including a first region with a first device and a second device and a second region with a resistance device; configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer; forming a stress inducing layer over the first region and the second region; processing at least a portion of the stress inducing layer formed over the first region to alter the stress within the stress inducing layer; and forming a third spacer adjacent the second spacer of the first device and the second device from the stress inducing layer.
Claims20
An integrated circuit system comprising:
- providing a substrate including a first region with a first device and a second device and a second region with a resistance device;
- configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer;
- forming a stress inducing layer over the first region and the second region;
- processing at least a portion of the stress inducing layer formed over the first region to alter the stress within the stress inducing layer;
- and
- forming a third spacer adjacent the second spacer of the first device and the second device from the stress inducing layer.
An integrated circuit system comprising:
- providing a substrate including a first region with a first device and a second device and a second region with a resistance device;
- configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer;
- forming a stress inducing layer over the first region and the second region;
- processing at least a portion of the stress inducing layer formed over the second device to alter the stress within the stress inducing layer;
- and
- forming a third spacer from the stress inducing layer to create a first stress level in the first device and a second stress level in the second device, the first stress level differing from the second stress level.
An integrated circuit system comprising:
- a substrate including a first region with a first device and a second device and a second region with a resistance device;
- the first device, the second device, and the resistance device each including a first spacer and a second spacer;
- and
- the first device and the second device further including a third spacer that creates a first stress level in the first device and a second stress level in the second device, the first stress level differing from the second stress level.
Dependencies are inferred from the claim text.