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US 2008/0173914 A1Published application
Semiconductor device and storage medium
AssigneeRenesas Electronics Corporation
InventorsChiemi HASHIMOTO, Toshio Yamada
Life of this patent
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Abstract
A power source noise of a semiconductor device having a core cell configuring a logic circuit is reduced. Above the core cell configuring the logic circuit provided on a main surface of a semiconductor substrate are provided a first branch line for a first power source of the core cell, which is electrically connected to a first power source trunk line, and a second branch line for a second power source of the core cell, which is electrically connected to a second power source trunk line. The first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources.
Claims17
A semiconductor device comprising:
- a core cell configuring a logic circuit provided over a main surface of a semiconductor substrate;
- an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the core cell;
- a first power source trunk line for a first power source of the core cell, the first power source trunk line being provided in the interlayer insulating film;
- a second power source trunk line for a second power source of the core cell, which is different from the first power source, the second power source trunk line being provided in the interlayer insulating film;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources.
5 more elements
A semiconductor device comprising:
- a cell row including a plurality of core cells and fill-cells configuring a logic circuit provided over a main surface of a semiconductor substrate;
- an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the fill-cells;
- a first power source trunk line for a first power source of the fill-cells, the first power source trunk line being provided in the interlayer insulating film;
- a second power source trunk line for a second power source of the fill-cells, which is different from the first power source, the second power source trunk line being provided in the interlayer insulating film;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources.
5 more elements
A semiconductor device comprising:
- a cell row including a plurality of core cells and tap-cells configuring a logic circuit provided over a main surface of a semiconductor substrate;
- an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the tap-cells;
- a first power source trunk line for a first power source of the tap-cells, the first power source trunk line being provided in the interlayer insulating film
- a second power source trunk line for a second power source of the tap-cells, which is different from the first power source, the second power source trunk line being provided in the interlayer insulating film;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources, and
- the capacitor is provided above the tap-cells.
6 more elements
A semiconductor device comprising:
- a first conductive type MIS transistor formed over a main surface of a semiconductor substrate;
- a second conductive type MIS transistor formed over the main surface of the semiconductor substrate;
- an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the first and second conductive type MIS transistors;
- a first power source trunk line for a first power source, the first power source trunk line being connected to the first conductive type MIS transistor;
- a second power source trunk line for a second power source different from the first power source, the second power source trunk line being connected to the second conductive type MIS transistor;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources.
6 more elements
A semiconductor device comprising:
- a semiconductor substrate including a first region and a second region adjacent to the first region;
- a first conductive type MIS transistor formed in the first region;
- a second conductive type MIS transistor formed in the first region;
- an interlayer insulating film provided over a main surface of the semiconductor substrate and in the first and second regions;
- a first power source trunk line for a first power source, the first power source trunk line being connected to the first conductive type MIS transistor;
- a second power source trunk line for a second power source different from the first power source, the second power source trunk line being connected to the second conductive type MIS transistor;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first and second branch lines are oppositely provided in the second region, thereby forming a capacitor between the first and second power sources.
7 more elements
A semiconductor device comprising:
- a semiconductor substrate including a first region and a second region adjacent to the first region;
- a first conductive type MIS transistor formed in the first region;
- a second conductive type MIS transistor formed in the first region;
- a first well of a second conductive type, the first well being formed in the second region;
- a second well of a first conductive type, the second well being formed in the second region;
- an interlayer insulating film provided over a main surface of the semiconductor substrate and in the first and second regions;
- a first power source trunk line of a first power source, the first power source trunk line being connected to the first conductive type MIS transistor;
- a second power source trunk line of a second power source different from the first power source, the second power source trunk line being connected to the second conductive type MIS transistor;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- and
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line,
- wherein the first branch line and the first well are electrically connected via a first contact,
- the second branch line and the second well are electrically connected via a second contact, and
- the first and second branch lines are oppositely provided in the second region, thereby forming a capacitor between the first and second power sources.
11 more elements
A semiconductor device comprising:
- a first conductive type MIS transistor formed over a main surface of a semiconductor substrate;
- a second conductive type MIS transistor formed over the main surface of the semiconductor substrate;
- an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the first and second conductive type MIS transistors;
- a first power source trunk line for a first power source, the first power source trunk line being connected to the first conductive type MIS transistor;
- a second power source trunk line for a second power source different from the first power source, the second power source trunk line being connected to the second conductive type MIS transistor;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line;
- and
- a wiring provided in the interlayer insulating film and electrically connecting a source of the first conductive MIS transistor and a drain of the second conductive type MIS transistor,
- wherein at least one of the first and second branch lines is provided oppositely to the wiring, thereby forming a capacitor over at least one of the first and second power sources.
7 more elements
A storage medium comprising:
- circuit design information including a constraint condition for forming a logic circuit over a main surface of a semiconductor substrate;
- cell information for forming a cell row to be formed over the main surface of the semiconductor substrate;
- and
- layout design information for making, over the main surface of the semiconductor substrate in accordance with the circuit design information and the cell information, layout of:
- first and second conductive type MIS transistors;
- an interlayer insulating film covering the first and second conductive MIS transistors;
- a first power source trunk line for a first power source, the first power source trunk line being connected to the first conductive MIS transistor;
- a second power source trunk line for a second power source different from the first power source, the second power source trunk line being connected to the second conductive MIS transistor;
- a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line;
- a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line;
- and
- a capacitor formed between the first and second power sources by the first and second branch lines being opposed to each other.
9 more elements
Dependencies are inferred from the claim text.