US 2008/0173871 A1 · Display Device and Manufacturing Method of Display Device

Abstract

In a display device which includes MIS transistors having semiconductor layers thereof formed of an amorphous semiconductor and MIS transistors having semiconductor layers thereof including a polycrystalline semiconductor, the present invention can enhance crystallinity of the semiconductor layers formed of the polycrystalline semiconductor when the respective MIS transistors adopt the bottom gate structure. In the display device, first MIS transistors formed in a first region of a substrate and second MIS transistors formed in a second region different from the first region respectively have a gate electrode thereof between the substrate and the semiconductor layer, the first MIS transistor has the semiconductor layer thereof formed of only the amorphous semiconductor, the second MIS transistor has the semiconductor layer thereof including the polycrystalline semiconductor, and a gate electrode of the second MIS transistor has a thickness smaller than a thickness of a gate electrode of the first MIS transistor.

Claims17

Dependent claims

A display device having MIS transistors each of which is formed by stacking a conductive layer, an insulation layer and a semiconductor layer on a substrate, wherein

first MIS transistors formed in a first region of the substrate and second MIS transistors formed in a second region different from the first region respectively have gate electrodes thereof between the substrate and the semiconductor layers,
the first MIS transistor has the semiconductor layer thereof formed of only an amorphous semiconductor, and the second MIS transistor has the semiconductor layer thereof including a polycrystalline semiconductor, and
a gate electrode of the second MIS transistor has a thickness smaller than a thickness of a gate electrode of the first MIS transistor.

A manufacturing method of a display device which includes an insulation substrate, first MIS transistors which are formed on a first region on the insulation substrate and have semiconductor layers thereof formed of only an amorphous semiconductor, and second MIS transistors which are formed on the second region on the insulation substrate and have semiconductor layers thereof including a polycrystalline semiconductor, the manufacturing method comprising the steps of:

forming gate electrodes on the insulation substrate;
forming a gate insulation film which covers the gate electrodes;
forming an amorphous semiconductor film on the gate insulation film;
and
melting and crystallizing only the amorphous semiconductor film in the second region out of the first region and the second region thus reforming the amorphous semiconductor film into polycrystalline semiconductor film, wherein
the step for forming the gate electrodes comprises a first step for forming a first conductive layer in the first region and the second region, and a second step for forming a second conductive layer only in the first region out of the first region and the second region;
the step being a step in which the gate electrode of the first MIS transistor having the first conductive layer and the second conductive layer, and the gate electrode of the second MIS transistor having the first conductive layer and having a film thickness smaller than a film thickness of the gate electrode of the first MIS transistor are formed.

4 more elements

Dependencies are inferred from the claim text.

Display Device and Manufacturing Method of Display Device

Life of this patent

Display Device and Manufacturing Method of Display Device

Life of this patent

Abstract

Claims17