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US 2008/0168279 A1Published application
Processor, memory device, computer system, and method for transferring data
AssigneeKabushiki Kaisha Toshiba
InventorTatsunori Kanai
Life of this patent
Estimating the term…
Abstract
A processor connected to a memory device includes a random number generator that generates random numbers identical to random numbers generated in the memory device; an XOR logic unit that performs a XOR operation of the random numbers and an address in the memory device to be accessed; and an after-operation-address sending unit that sends an after-operation-address indicating a result of the XOR operation.
Claims3
1-13. (canceled)
A processor connected to a memory device comprising:
- a random number generator that generates random numbers identical to random numbers generated in the memory device;
- an XOR logic unit that performs an XOR operation of the random numbers and an address in the memory device to be accessed;
- an after-operation-address sending unit that sends an after-operation-address indicating a result of the XOR operation;
- and
- an encryption unit that encrypts data sent by the processor by using the address in the memory device for the data or a portion as a key to obtain the encrypted data;
- and
- an encrypted data sending unit that sends the encrypted data.
4 more elements
A memory device for storing data utilized by a processor, comprising:
- an after-operation-address obtaining unit that obtains, from the processor, an after-operation-address indicating a result of an XOR operation of an address in the memory device to be accessed by the processor and random numbers generated by the processor;
- a random number generator that generates random numbers identical to random numbers generated by the processor;
- an XOR logic unit that determines the address of the data by performing the XOR operation of the after-operation-address and the random numbers generated by the random number generator;
- a control unit that allows an access to a specified address;
- and
- an encrypted data obtaining unit that, from the processor, obtains the encrypted data encrypted by using the address of the data or a portion as a key,
- wherein the control unit stores the encrypted data in the address.
4 more elements
Dependencies are inferred from the claim text.