Cache coherence monitoring and feedback
AssigneeIBM Corporation
InventorsXiaowei Shen, David F. Bacon, Robert W. Wisniewski, Orran Krieger
Life of this patent
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Abstract
Color-based caching allows each cache line to be distinguished by a specific color, and enables the manipulation of cache behavior based upon the colors of the cache lines. When multiple threads are able to share a cache, effective cache management is critical to overall performance. Color-based caching provides an effective method to better utilize caches and avoid unnecessary cache thrashing and pollution. Hardware maintains color-based counters relative to the cache lines to monitor and obtain feedback on cache line events. These counters are utilized for cache coherence transactions in multiple processor systems.
Claims19
An apparatus for guaranteeing Quality-Of-Service of cache utilization, said apparatus comprising:
- a generator that generates memory access operations in response to software;
- an assignor that assigns a color to memory access operations;
- a receiver that receives and records color information for each cache line based upon the operation utilizing the cache line;
- wherein the hardware maintains at least one color-based counter.
A method of guaranteeing Quality-Of-Service of cache utilization, said method comprising the steps of:
- generating memory access operations in response to software;
- assigning a color to memory access operations;
- receiving and recording color information for each cache line based upon the operation utilizing the cache line;
- wherein the hardware maintains color-based counters.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for monitoring cache coherence, said method comprising the steps of:
- generating memory access operations in response to software;
- assigning a color to memory access operations;
- receiving and recording color information for each cache line based upon the operation utilizing the cache line;
- wherein the hardware maintains color-based counters.
Dependencies are inferred from the claim text.