Memory system and method using scrambled address data
AssigneeSamsung Electronics Co., Ltd.
InventorsOh-Suk Kwon, Sung-Soo Lee, Dae-Seok Byeon
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Abstract
A memory system and a method of provided scrambled address data are disclosed. The method includes converting external address data into row and column addresses provided to a flash memory device, and designating certain scrambled address data values within the external address data and ignoring a current data access operation associated with external address data including a scrambled address data value, such that the plurality of physical pages in each memory block is not selected by the internal address data.
Claims16
A method of scrambling address data within a flash memory system comprising a flash controller and a flash memory device storing 2N+1-bit data, where N is a positive integer greater than or equal to one, wherein data stored in the flash memory device is arranged in a plurality of memory blocks, each memory block including a plurality of physical pages, the method comprising:
- converting external address data received from the flash controller into internal address data operative within the flash memory device;
- and
- designating certain scrambled address data values within the external address data and ignoring a current data access operation associated with external address data including a scrambled address data value, such that the plurality of physical pages in each memory block is not selected by the internal address data.
A memory system comprising:
- a flash controller and a flash memory device storing 2N+1-bit data, where N is a positive integer greater than or equal to one, wherein data stored in the flash memory device is arranged in a plurality of memory blocks, each memory block including a plurality of physical pages,
- wherein the flash memory device is configured with circuitry converting external address data received from the flash controller into internal address data operative within the flash memory device, wherein certain scrambled address data values within the external address data cause the circuitry to ignoring a current data access operation associated with external address data including a scrambled address data value, such that the plurality of physical pages in each memory block is not selected by the internal address data.
Dependencies are inferred from the claim text.