I/O Adapter LPAR Isolation With Assigned Memory Space Using PCIe Requestor IDs
AssigneeInternational Business Machines Corporation
InventorThomas A. Gregg
Life of this patent
Estimating the term…
Abstract
A data processing system and method of isolating a plurality of I/O adapters in the system. The data processing system also comprises a set of processors communicating with the I/O adapters using a PCIe protocol. Each of the I/O adapters has a respective ID. In the preferred embodiment the commands issued by the I/O adapters include a PCIe defined Requestor ID field including one or more of the Requestor IDs of I/O Adapters. The Req IDs can be used as an input to a CAM which provides an index to a TVT to identify a unique and independent system memory space for the I/O adapter.
Claims20
A data processing system, comprising:
- a set of processors and system memory;
- a plurality of I/O adapter units each having a respective identifier;
- the set of processors and system memory communicating with the plurality of I/O adapter units using a PCIe protocol;
- the plurality of I/O adapter units includes functionality for sending requests to the set of processors and system memory via the PCIe protocol, said requests including the respective identifier to identify one of the I/O adapter units;
- and
- the processors and system memory including a CAM for generating an index value based on the respective identifier for indexing in a TVT defined system memory space requested by said one of the I/O adapter units.
A method of isolating a plurality of I/O adapter units of a data processing system, said data processing system comprising a set of processors, content addressable memory, and a TVT, said method comprising the steps of:
- assigning to each of the I/O adapter units a respective identifier;
- the I/O adapter units sending memory requests to the set of processors, each request including said respective identifier;
- and
- indexing in the TVT a memory space requested by said each request based on an index value provided by the CAM in response to the respective identifier.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for isolating a plurality of I/O adapter units of a data processing system, said data processing system comprising a set of processors, a host bridge, and a content addressable memory, said method steps comprising:
- assigning to each of the I/O adapter units a respective identifier;
- the I/O adapter units sending memory requests to the set of processors, each request including said respective identifier;
- and
- indexing in a TVT a memory space requested by said each request based on an index value provided by the CAM in response to the respective identifier.
Dependencies are inferred from the claim text.