Semiconductor package including connected upper and lower interconnections, and manufacturing method thereof
AssigneeCasio Computer Co., Ltd.
InventorHiroyasu JOBETTO
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AssigneeCasio Computer Co., Ltd.
InventorHiroyasu JOBETTO
Estimating the term…
A semiconductor package includes a base plate, at least one semiconductor constructing body which is formed on one surface of the base plate and has a plurality of external connection electrodes formed on a semiconductor substrate, an insulating layer which is formed on one surface of the base plate around the semiconductor constructing body, upper interconnections which are formed on the insulating layer and each includes at least one interconnection layer, at least some of the upper interconnections are connected to the external connection electrodes of the semiconductor constructing body, lower interconnections which are formed on the other surface of the base plate and each includes at least one interconnection layer, and at least some of the lower interconnections which are electrically connected to the upper interconnections.
A method of manufacturing a semiconductor package comprising:
A method of manufacturing a semiconductor package, the semiconductor package comprising a first semiconductor package and at least one second semiconductor package,
Dependencies are inferred from the claim text.