US 2008/0165600 A1Published application

Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module

AssigneeKingston Technology Corporation

InventorsRamon S. Co, David Sun

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Abstract

A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

Claims11

Dependent claims

A method for testing and repairing memory modules comprising:

pre-screening memory chips using limited test patterns that test individual memory chips before the memory chips are soldered to a substrate, wherein memory chips passing the limited test patterns are sorted as pre-screened memory chips;
wherein the limited test patterns allow at least some single-bit errors in the memory chips to go undetected by pre-screening, wherein the pre-screened memory chips comprise at least some defective memory chips having single-bit errors undetected by the limited test patterns;
soldering pre-screened memory chips to memory module substrates;
soldering repairing Advanced Memory Buffers (AMB) to the memory module substrates to generate assembled memory modules;
wherein the repairing AMB comprises a repair controller and a repair address buffer;
testing the assembled memory modules by sending packets with commands over serial lines to the repairing AMB and receiving packets with data read from the pre-screened memory chips soldered to the memory module substrates or a status of multiple reads of data from the pre-screened memory chips soldered to the memory module substrates;
the repairing AMB decoding the packets received over the serial lines and writing and reading data to and from the pre-screened memory chips soldered to the memory module substrates in response to the commands in the packets;
sorting assembled memory modules that pass testing as good memory modules;
sorting assembled memory modules that fail testing as failed memory modules;
locating failed memory locations in the failed memory modules;
writing repair addresses of the failed memory locations to the repair address buffer in the repairing AMB;
and
re-testing the failed memory modules at the failed memory locations, the repair controller re-directing data accesses from a failed memory chip to a spare repair memory for the failed memory locations in the repair address buffer;
whereby failed memory modules are repaired by the spare repair memory for the failed memory locations written into the repair address buffer.

11 more elements

A repairing advanced memory buffer comprising:

southbound input means for receiving packets over southbound serial lanes from a host processor;
southbound output means for transmitting packets over southbound serial lanes to a downstream memory module;
southbound re-timer means, coupled between the southbound input means and the southbound output means, for re-timing packets received by the southbound input means for transmission over the southbound output means;
northbound input means for receiving packets over northbound serial lanes from the downstream memory module;
northbound output means for transmitting packets over northbound serial lanes toward the host processor;
northbound re-timer means, coupled between the northbound input means and the northbound output means, for re-timing packets received by the northbound input means for transmission over the northbound output means;
memory controller means for generating local control signals to memory chips on a local memory module containing the repairing advanced memory buffer;
packet extract means, coupled between the southbound re-timer means and the memory controller means, for extracting commands, address and data from packets received over the southbound input means from the host processor;
packet generation means, coupled between the northbound re-timer means and the memory controller means, for generating packets for transmission over the northbound output means to the host processor;
wherein the packets generated by the packet generation means contain data read from the memory chips by the memory controller means for address locations within the memory chips that are not defective address locations;
repair address buffer means for storing repair addresses, the repair addresses identifying address locations within the memory chips that are defective address locations;
and
repair controller means, coupled to the repair address buffer means and to the memory controller means, for disabling access of the memory chips by the memory controller means for repair addresses,
whereby access of memory chips is disabled for repair addresses.

11 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/053,261Filed 21 Mar 2008
Priority: 24 Jul 2006
Published: 10 Jul 2008
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

G11C 5/04
Disposition of storage elements, e.g. in the form of a matrix array: supports for storage elements , e.g. memory modules; Mounting or fixing of…
G11C 29/808
With improved layout: using a flexible replacement scheme
G11C 29/88
Masking faults in memories by using spares or by reconfiguring: with partially good memories
G11C
Static stores

Family

Application11/309,297Division · filed 24 Jul 2006
Application12/053,261Division
US 2008/0019198 A1Published application
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US 2008/0165600 A1This patent

From the US filing history. Foreign family members aren’t listed.