Semiconductor memory device and method for driving the same
AssigneeHynix Semiconductor Inc.
InventorsKyoung-Nam Kim, Yoon-Jae Shin
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes: a modulation controller for generating a modulation control signal for controlling a frequency modulation operation; a delay locked loop (DLL) circuit for performing a delay locking operation to generate first and second DLL clocks and outputting a frequency-modulated DLL clock in response to the modulation control signal; and a data strobe signal generator for outputting the frequency-modulated DLL clock as a data strobe signal.
Claims27
A semiconductor memory device, comprising:
- a modulation controller for generating a modulation control signal for controlling a frequency modulation operation;
- a delay locked loop (DLL) circuit for performing a delay locking operation to generate first and second DLL clocks and outputting a frequency-modulated DLL clock in response to the modulation control signal;
- and
- a data strobe signal generator for outputting the frequency-modulated DLL clock as a data strobe signal.
A method for driving a semiconductor memory device, comprising:
- generating a frequency modulation control signal;
- performing a delay locking operation to generate a delay locked loop (DLL) clock modulated in response to the frequency modulation control signal;
- and
- outputting the modulated DLL clock as a data strobe signal.
A semiconductor memory device, comprising:
- a delay locked loop (DLL) circuit for performing a delay locking operation to generate a DLL clock;
- a modulation controller for generating a modulation control signal for controlling a frequency modulation operation;
- a duty corrector for correcting a duty ratio of the DLL clock and outputting the DLL clock modulated in response to the modulation control signal;
- and
- a data strobe signal generator for outputting the modulated DLL clock as a data strobe signal.
A method for driving a semiconductor memory device, comprising:
- performing a delay locking operation to generate a delay locked loop (DLL) clock;
- generating a frequency modulation control signal;
- correcting a duty ratio of the DLL clock and frequency-modulating the DLL clock in response to the frequency modulation control signal;
- and
- outputting the modulated DLL clock as a data strobe signal.
A semiconductor memory device, comprising:
- a delay locked loop (DLL) circuit for performing a delay locking operation to generate a DLL clock;
- a modulation controller for generating a modulation control signal for controlling a frequency modulation operation;
- a clock output circuit for outputting a modulated clock under the control of the modulation controller;
- and
- a data strobe signal generator for outputting the modulated DLL clock as a data strobe signal.
A method for driving a semiconductor memory device, comprising:
- performing a delay locking operation to generate a delay locked loop (DLL) clock;
- generating a frequency modulation control signal;
- frequency-modulating the DLL clock in response to the frequency modulation control signal;
- and
- outputting the frequency-modulated clock as a data strobe signal.
Dependencies are inferred from the claim text.