Low-Phase Noise Low-Power Accurate I/Q Generator Using A Dynamic Frequency Divider

An I/Q signal generator, comprising:

• a signal generation circuit responsive to a clock signal and a clock-bar signal so as to generate an in-phase signal and a quadrature-phase signal, said signal generation circuit including:
• a plurality of single-phase frequency dividers each including an output port for providing an output signal and an internal node for providing an internal signal, each said single-phase frequency divider configured to phase-lock said output signal and said internal signal 90° apart;
• an in-phase output line and a quadrature-phase output line each in direct communication with differing ones of said output ports and said internal nodes;
• and
• first and second 180° phase-lock circuits each coupled between ones of said plurality single-phase frequency dividers so that said in-phase signal outputs said in-phase signal and said quadrature-phase output line outputs said quadrature-phase signal.

A method of generating an in-phase signal and a corresponding quadrature-phase signal, comprising:

• receiving a clock signal having a frequency;
• generating an in-phase signal as a function of said clock signal so that said in-phase signal has a frequency equal to one-half of said frequency of said clock signal;
• generating a quadrature-phase signal as a function of said clock signal so that said quadrature-phase signal has a frequency equal to one-half of said frequency of said clock signal;
• phase-locking said in-phase signal to a complementary in-phase signal;
• and
• phase-locking said quadrature-phase signal to a complementary quadrature-phase signal.