Semiconductor memory device and method for driving the same
AssigneeHynix Semiconductor Inc.
InventorsJee-Yul Kim, Beom-Ju Shin
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes: a delay locked loop (DLL) for delaying an external clock to generate a DLL clock; an output control unit for generating a select signal based on a column address strobe (CAS) latency signal and a delay time corresponding to a total delay time of the DLL being in a delay locked state; and an output enable signal generating unit for generating a plurality of output enable signals in response to the DLL clock and outputting a final output enable signal in response to the select signal.
Claims24
A semiconductor memory device, comprising:
- a delay locked loop (DLL) for delaying an external clock to generate a DLL clock;
- an output control unit for generating a select signal based on a column address strobe (CAS) latency signal and a delay time corresponding to a total delay time of the DLL being in a delay locked state;
- and
- an output enable signal generating unit for generating a plurality of output enable signals in response to the DLL clock and outputting a final output enable signal in response to the select signal.
A method for driving a semiconductor memory device having a delayed locked loop (DLL), comprising:
- delaying an external clock to generate a DLL clock;
- generating a select signal based on a column address strobe (CAS) latency signal and a delay time corresponding to a total delay time of the DLL being in a delay locked state;
- and
- generating a plurality of output enable signals in response to the DLL clock and outputting a final output enable signal in response to the select signal.
Dependencies are inferred from the claim text.