Pll loop bandwidth calibration

An apparatus that facilitates calibration of a PLL in a wireless communication system, comprising:

• means for inducing a loop response of the PLL at least in part by modifying one or more parameters relating to a divider in a feedback path of the PLL;
• means for measuring a response time associated with the loop response of the PLL;
• and
• means for adjusting loop bandwidth of the PLL based on the measured response time of the PLL to cause the PLL to operate at a desired loop bandwidth.

A computer-readable medium, comprising:

• code for causing a computer to modify a feedback counter of a PLL;
• code for causing a computer to measure an amount of settling time required by the PLL to settle as a result of the modification of the feedback counter;
• and
• code for causing a computer to adjust loop bandwidth of the PLL at least in part by adjusting one or more parameters of an element in the PLL based on the measured amount of settling time.

An integrated circuit that executes computer-executable instructions for adjusting a loop bandwidth of a PLL, the instructions comprising:

• tuning a VCO in the PLL to a desired frequency;
• locking the PLL at the desired frequency;
• recording a tuning voltage of the VCO associated with the desired frequency;
• changing a value of a feedback counter of the PLL from a first value to a second value to cause a change in the tuning voltage of the VCO;
• changing the value of the feedback counter back to the first value and measuring a settling time required by the VCO to return to the recorded tuning voltage;
• and
• adjusting a time constant of the PLL based on the measured settling time to provide a desired loop bandwidth for the PLL.