US 2008/0164907 A1 · CUSTOMIZED SILICON CHIPS PRODUCED USING DYNAMICALLY CONFIGURABLE POLYMORPHIC NETWORK

Abstract

A fabrication technique called “component and polymorphic network,” in which semiconductor chips are made from small prefabricated bare electronic component dies, e.g., application specific integrated circuits (ASICs), that are assembled according to designer specifications, and bonded to a semiconductor substrate comprising the polymorphic network. The component and polymorphic network assembly has a low overhead for producing custom chips. In another exemplary embodiment, the polymorphic network can be combined with functional components in a single die. The interconnect scheme for ports on the polymorphic network can be configured or reconfigured with configuration data prior to the runtime of an application, to achieve different interconnect schemes.

Claims25

Dependent claims

A customizable semiconductor chip, comprising:

(a) at least one functional electronic component, each functional electronic component having a plurality of first connection ports used for input and output of electrical signals;
and
(b) a polymorphic network comprising a semiconductor substrate on which the at least one functional electronic component is bonded, the polymorphic network including a plurality of second connection ports that are electrically connected to the first connection ports, the polymorphic network including a plurality of signal conveyance resources for selectively interconnecting specific ones of the second connection ports to specific other ones of the second connection ports in a desired interconnection scheme, wherein the desired interconnection scheme can be modified up to a time that an application that will use the desired interconnection scheme is run by the customizable semiconductor chip.

A method for applying a desired interconnection scheme to a polymorphic network of a customizable semiconductor chip to provide a desired functionality for the customizable semiconductor chip, wherein the customizable semiconductor chip includes at least one functional component that is coupled to the polymorphic network in a semiconductor die, comprising the steps of:

(a) providing configuration data that define the desired interconnection scheme specifying interconnections between ports on the at least one functional component;
(b) loading the configuration data into memory registers that define the state of configurable data interconnections within the polymorphic network to achieve the desired interconnection scheme;
and
(c) while running an application on the customizable semiconductor chip that will employ the desired interconnection scheme, applying the configuration data stored in the memory to selectively modify signal conveyance resources of the polymorphic network to achieve specific interconnections between the ports of the at least one functional component.

1 more element

A polymorphic network that is configured to interconnect ports and to enable redefining interconnections between the ports of one or more functional components, comprising:

(a) a semiconductor substrate that includes a plurality of ports adapted to electrically connect to corresponding ports on one or more functional components and including input connections adapted for coupling the semiconductor substrate into an external circuit;
(b) a plurality of configurable data connections that can be selectively set to open or close conductive paths between and through specific electrical conductors in the polymorphic network;
and
(c) memory registers in which are stored connection data defining states of the configurable data connections to achieve a desired interconnection scheme for electrically interconnecting the plurality of ports of the polymorphic network, the states of the configurable data connections being modifiable at any time until an application that will use the polymorphic network is run.

1 more element

Dependencies are inferred from the claim text.

Customized silicon chips produced using dynamically configurable polymorphic network

Life of this patent

Customized silicon chips produced using dynamically configurable polymorphic network

Life of this patent

Abstract

Claims25