I/O interface circuit of intergrated circuit
AssigneeNEC Electronics Corporation
InventorShinsuke Hamanaka
Life of this patent
Estimating the term…
Abstract
A plurality of transistor pairs of Pch and Nch transistors are connected in series between VDD and GND. An I/O terminal is connected to each connection point of the transistor pairs. Two transistor pairs constitute one transistor set, in which each of two Pch transistors and two Nch transistors have the same on-resistance. In input mode, one of the two transistor pairs in a first set is turned on, and a transistor pair of a second or later set is selectively turned on. In output mode, two Pch transistors or two Nch transistors of the first set are turned on, and a transistor of the second or later set is selectively turned on.
Claims15
An input/output interface circuit of an integrated circuit, comprising:
- a plurality of transistor pairs;
- an input/output terminal being connected to a connection point of each transistor pair of the plurality of transistor pairs;
- and
- a controller controlling switching of each transistor of the plurality of transistor pairs to constitute an output buffer in output mode and a termination circuit in input mode, and controlling output impedance of the output buffer and load impedance of the termination circuit to be a predetermined value,
- wherein said plurality of transistor pairs constitute a driver including a primary driver and a secondary driver, and the controller comprises a drive controller controlling switching of each transistor of the driver, and an impedance controller outputting an impedance control signal to the drive controller which generates a control signal for controlling said secondary driver and for controlling impedance of the driver based on reference resistance, and
- wherein said primary driver is controlled other than by said impedance controller.
A controller for an input/output interface circuit having a plurality of transistor pairs which constitute a primary driver and a secondary driver, and an input/output terminal which is connected to a connection point of each transistor pair of the plurality of transistor pairs, said controller comprising:
- a drive controller controlling switching of each transistor in said plurality of transistor pairs;
- and
- an impedance controller outputting an impedance control signal to the drive controller which generates a control signal for controlling said secondary driver and for controlling impedance of the secondary driver based on a reference resistance, said primary driver being controlled other than by said impedance controller.
Dependencies are inferred from the claim text.