Device for probe card power bus noise reduction
OwnerRaphael Peter ROBERTAZZIinventor
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Abstract
Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor “booster” bypass network on the probe card in which the capacitors are charged to a much higher voltage Vboost than the DUT power supply voltage VDD. Charging the capacitors to a voltage N×VDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.
Claims8
A voltage drop suppression device for maintaining constant voltage on a power bus of a probe card used for semiconductor wafer testing, the device comprising:
- a bypass capacitor mounted the probe card, wherein the bypass capacitor is charged to a voltage greater than a power supply voltage VTDD of a device under test;
- and
- an active regulation circuit controlling the discharge of the bypass capacitor to supply current to the power bus for suppressing a voltage drop on the power bus generated by a current surge during testing of the device under test.
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Dependencies are inferred from the claim text.