Non-destructive test structure for printed circuit board characterization and method for same
AssigneeDell Products L.P.
InventorsRandy Hemingway, Aubrey K. Sparkman
Life of this patent
Estimating the term…
Abstract
A non-destructive test structure for printed circuit board characterization and method of testing the same are disclosed. In one form, a method for testing a printed circuit board can include applying a test signal to a first test location of a first test structure associated with a first inner bus layer of a printed circuit board. The method can also include measuring a crosstalk voltage at a second test location operably associated with the first test structure. The method can further include comparing the crosstalk voltage to a crosstalk specification of the printed circuit, board.
Claims20
A method for testing a printed circuit, hoard, the method comprising:
- applying a test signal to a first test location of a first test structure associated with a first inner bus layer of a printed circuit board;
- measuring a crosstalk voltage at a second test location operably associated with the first test structure;
- and
- comparing the crosstalk voltage to a crosstalk specification of the printed circuit board.
A printed circuit board comprising:
- a first test structure located within the printed circuit board at a first bus layer, the first test structure including;
- a first elongated conductive element extending along a length of the printed circuit, board, the first elongated conductive element including a first width;
- a second elongated conductive element extending approximately parallel to the first elongated conductive element, the second elongated conductive element including approximately the length and the first width;
- and
- an expected crosstalk value measurable by applying a test signal to the first elongated conductive element and measuring a crosstalk voltage using the second elongated conductive element.
An information handling system comprising:
- a printed circuit board;
- and
- a first, test structure located within the printed circuit board at a first bus layer, the first test structure including:
- a first elongated conductive element provided at a first inner bus layer, the first elongated conductive element including:
- a first length;
- and
- a first width approximately equal to a trace width of a bus line provided in association with a first bus located within the first inner bus layer;
- a second elongated conductive element provided at the first inner bus layer, the second elongated conductive element including:
- a second length approximately equal to the first length;
- and
- a second width approximately equal to the first width;
- and
- an expected crosstalk value associated with the test structure, the expected crosstalk value measurable by coupling a test, signal to the first elongated conductive element and detecting a crosstalk voltage using the second elongated conductive element.
Dependencies are inferred from the claim text.