Method of packaging semiconductor devices
AssigneeFreescale Semiconductor, Inc.
InventorsKevin J. Hess, Chu-Chung Lee, Robert J. Wenzel
Life of this patent
Estimating the term…
Abstract
A method of packaging a semiconductor includes providing a support structure. An adhesive layer is formed overlying the support structure and is in contact with the support structure. A plurality of semiconductor die is placed on the adhesive layer. The semiconductor die are laterally separated from each other and have electrical contacts that are in contact with the adhesive layer. A layer of encapsulating material is formed overlying and between the plurality of semiconductor die and has a distribution of filler material. A concentration of the filler material is increased in all areas laterally adjacent each of the plurality of semiconductor die.
Claims20
A method comprising:
- providing a support structure;
- forming an adhesive layer overlying the support structure, the adhesive layer having a first adhesive surface in contact with the support structure and an opposite second adhesive surface;
- placing a plurality of semiconductor die on the second adhesive surface of the adhesive layer, the plurality of semiconductor die being laterally separated from each other and having electrical contacts that are in contact with the second adhesive surface of the adhesive layer;
- forming a layer of encapsulating material overlying and between the plurality of semiconductor die, the layer of encapsulating material having a distribution of filler material;
- and
- increasing a concentration of the filler material in all areas laterally adjacent each of the plurality of semiconductor die.
A semiconductor structure comprising:
- a semiconductor die having an active surface with a plurality of electrical contacts for making electrical connection to the semiconductor die;
- an encapsulant surrounding the semiconductor die on all sides of the semiconductor die except the active surface of the semiconductor die, the encapsulant comprising a high concentration region comprising a filler material that represents at least eighty-five percent (85%) by weight of total weight of the high concentration region;
- and
- one or more interconnect layers overlying the active surface of the semiconductor die for electrical interconnect to the semiconductor die.
A method comprising:
- providing a base;
- placing an adhesive tape overlying the base, the adhesive tape having a first adhesive surface in contact with the base and an opposite second adhesive surface;
- placing a plurality of semiconductor die on the second adhesive surface of the adhesive tape, the plurality of semiconductor die being laterally separated from each other and having electrical contacts that are in contact with the second adhesive surface of the adhesive layer;
- forming an encapsulant overlying and between the plurality of semiconductor die, the encapsulant having a distribution of filler material;
- and
- creating a high concentration region in all areas of the filler material that are laterally adjacent each of the plurality of semiconductor die, the high concentration region having at least eighty-five percent by weight of filler material.
Dependencies are inferred from the claim text.