Light erasable memory and method therefor
AssigneeFreescale Semiconductor, Inc.
InventorsRajesh A. Rao, Leo Mathew, Ramachandran Muralidhar, Bruce E. White
Life of this patent
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Abstract
A semiconductor device has a semiconductor substrate that in turn has a top semiconductor layer portion and a major supporting portion under the top semiconductor layer portion. An interconnect layer is over the semiconductor layer. A memory array is in a portion of the top semiconductor layer portion and a portion of the interconnect layer. The memory is erased by removing at least a portion of the major supporting portion and, after the step of removing, applying light to the memory array from a side opposite the interconnect layer. The result is that the memory array receives light from the backside and is erased.
Claims20
For a semiconductor device comprising a semiconductor substrate comprising a top semiconductor layer portion and a major supporting portion under the top semiconductor layer portion, an interconnect layer over the semiconductor layer, and a memory array in a portion of the top semiconductor layer portion and a portion of the interconnect layer, a method of erasing the memory array, comprising:
- removing at least a portion of the major supporting portion;
- and
- after the step of removing, applying light to the memory array from a side opposite the interconnect layer.
A method, comprising:
- obtaining a semiconductor substrate having a top semiconductor layer portion and a major supporting portion under the top semiconductor layer portion;
- forming a memory array and an interconnect layer wherein the interconnect layer is over the top semiconductor layer portion and the memory array is in a first portion of the top semiconductor layer portion and a first portion of the interconnect layer;
- attaching a supporting substrate to the interconnect layer;
- removing at least a portion of the major supporting portion after the step of attaching;
- removing the supporting substrate after the step of removing;
- and
- applying light of at least 3 eV toward the memory array from a side opposite to the interconnect layer.
A semiconductor device, comprising:
- an interconnect layer over a semiconductor layer;
- a memory array in a portion of the semiconductor layer and a portion of the interconnect layer, wherein the memory array has a backside, wherein the backside is opposite the interconnect layer;
- and;
- erase means for erasing the memory array by applying light to the backside of the memory array.
Dependencies are inferred from the claim text.