Semiconductor Integrated Circuit
AssigneePanasonic Corporation
InventorYoshiyuki Kawakami
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AssigneePanasonic Corporation
InventorYoshiyuki Kawakami
Estimating the term…
When dummy patterns are arranged to planarize LSI layout patterns, a plurality of dummy patterns 1 are arranged in a wiring layer in which signal wiring patterns 2 are formed, so as to be inclined at an angle of generally 45 degrees toward the associated signal wiring patterns 2. These dummy patterns 1 cross signal wiring patterns 3 formed in another vertically adjacent wiring layer to have an inclination angle of generally 45 degrees. A plurality of dummy patterns 13 are located in the wiring layer in which the signal wiring patterns 3 are formed, so as to be inclined at an angle of generally 45 degrees toward the associated signal wiring patterns 3. The dummy patterns 1 formed in one of the adjacent wiring layers cross the dummy patterns 13 formed in the other wiring layer at an angle of generally 90 degrees. This reduces fluctuations in wiring capacitance and equalizes fluctuations in the wiring capacitance to the maximum extent.
A semiconductor integrated circuit comprising a real pattern group including a plurality of wiring patterns for providing connection either between a pair of circuits, between a pair of elements or between a circuit and an element, the real pattern group being formed in each of a plurality of wiring layers, and a plurality of dummy patterns formed in a region of each said wiring layer in which the real pattern group is not placed,
A semiconductor integrated circuit comprising a real pattern group including a plurality of wiring patterns for providing connection either between a pair of circuits, between a pair of elements or between a circuit and an element, the real pattern group being formed in each of a plurality of wiring layers, and a plurality of dummy patterns formed in a region of each said wiring layer in which the real pattern group is not placed,
A semiconductor integrated circuit comprising a real pattern group including a plurality of wiring patterns for providing connection either between a pair of circuits, between a pair of elements or between a circuit and an element, the real pattern group being formed in each of a plurality of wiring layers, and a plurality of dummy patterns formed in a region of each said wiring layer in which the real pattern group is not placed,
Dependencies are inferred from the claim text.