Integrated circuit arrangement to set a phase difference

Abstract

An integrated circuit arrangement (1; 2; 3; 4) for setting a predefined phase difference (phi_target) between a first high-frequency signal (x1; x1p, x1n) and a second high-frequency signal (x2; x2p, x2n), comprising: e) a chain connection of a plurality (N) of basic circuits (10; 20; 30; 40), whereby each basic circuit has a first transmission line (11; 11p, 11n) for transmitting the first signal (x1; x1p, x1n), a second transmission line (12; 12p, 12n) for transmitting the second signal (x2; x2p, x2n), and a controllable phase-influencing means (13; 23; 33; 43), connected to the first transmission line, for controllably influencing the phase of the first signal, f) a phase difference detector (14; 34), which is connected to the output-side basic circuit and is formed to detect a current phase difference (phi_actual) between the first and second signal, g) a control unit (15; 35), which is connected to the phase difference detector and each controllable phase-influencing means (13; 23; 33; 43) and is formed to generate first digital control voltages, dependent on the current phase difference (phi_actual), as control signals (vt1, vt2, . . . ) for each phase-influencing means (13; 23; 33; 43), whereby the digital control voltage can assume only two different voltage values, and h) whereby each controllable phase-influencing means (13; 23; 33; 43;) has at least one first tunable capacitive unit (16; 16p, 16n; 46p, 46n), which is connected to the first transmission line and the control unit and is designed to delay the first signal depending on one of the first control signals.

Dependencies are inferred from the claim text.