Multi-chips package and method of forming the same
AssigneeAdvanced Chip Engineering Technology Inc.
InventorWen-Kun Yang
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AssigneeAdvanced Chip Engineering Technology Inc.
InventorWen-Kun Yang
Estimating the term…
The present invention provides a structure of multi-chips package comprising: a substrate with a die receiving cavity formed within an upper surface of the substrate and a first through holes structure, wherein terminal pads are formed under the first through holes structure. A first die is disposed within the die receiving cavity and a first dielectric layer is formed on the first die and the substrate. A first re-distribution conductive layer (RDL) is formed on the first dielectric layer. A second dielectric layer is formed over the first RDL. A third dielectric layer is formed under a second die. A second re-distribution conductive layer (RDL) is formed under the third dielectric layer. A fourth dielectric layer is formed under the second RDL. Conductive bumps are coupled to the first RDL and the second RDL. A surrounding material surrounds the second die. The second die is coupled to the first die through the first RDL, second RDL and the conductive bumps.
A structure of multi-chips package, comprising:
A structure of multi-chips package, comprising:
A method for forming semiconductor device package, comprising:
Dependencies are inferred from the claim text.