US 2008/0157304 A1 · CHIP PACKAGE STRUCTURE

Abstract

A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface, a back surface and bonding pads disposed on the active surface. The lead frame includes a die pad, an insulating layer, transfer bonding pads and inner leads. The back surface of the chip is fixed on the die pad. The insulating layer is disposed on the die pad outside the chip. The transfer bonding pads are disposed on the insulating layer. The first bonding wires are respectively connected to the bonding pads and the transfer bonding pads. The second bonding wires are respectively connected to the transfer bonding pads and the inner leads. The chip package structure has smaller volume and a higher yield rate.

Claims7

Dependent claims

A chip package structure, comprising:

a chip, having an active surface, a back surface and a plurality of bonding pads, wherein the bonding pads are disposed on the active surface;
a lead frame, comprising:
a die pad, the back surface of the chip fixed on the die pad;
an insulating layer, disposed on the die pad outside the chip;
a plurality of transfer bonding pads, disposed on the insulating layer;
and
a plurality of inner leads;
a plurality of first bonding wires, respectively connected to the bonding pads and the transfer bonding pads;
and
a plurality of second bonding wires, respectively connected to the transfer bonding pads and the inner leads.

7 more elements

Dependencies are inferred from the claim text.

Chip package structure

Life of this patent

Chip package structure

Life of this patent

Abstract

Claims7