Method for fabricating a semiconductor device

A method for fabricating a semiconductor device, the method comprising:

• forming a gate pattern over a substrate, the gate pattern including a gate insulation layer, an oxidation suppression layer, and a polysilicon layer;
• forming a spacer on sidewalls of the gate pattern;
• forming impurity regions on the substrate at both sides of the gate pattern, the impurity regions having a conductivity type opposite to that of the substrate;
• forming a first metal layer over the substrate;
• forming first and second silicide layers over the polysilicon layer and the impurity regions by performing a first thermal annealing process;
• removing a non-reacted portion of the first metal layer;
• forming a premetal dielectric layer over the substrate to cover a device isolation structure of the substrate, the spacer, and the first and second silicide layers;
• polishing the premetal dielectric layer to expose the first silicide layer;
• forming a second metal layer over the premetal dielectric layer to contact the first silicide layer, the second metal layer comprising a conductive metal substantially the same as the first metal layer comprises;
• performing a second thermal annealing process to the second metal layer to fully silicide the polysilicon layer and the oxidation suppression layer, thereby forming a third silicide layer;
• and
• removing a non-reacted portion of the second metal layer.