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US 2008/0157210 A1Published application
High-linearity and high-power CMOS structure and manufacturing method for the same
AssigneeChang Gung University
InventorsHsien-Chin Chiu, Chien-Cheng Wei, Wei-Hsien Lee, Wu-Shiung Feng
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Abstract
This invention relates to a high-linearity and high-power CMOS structure and a method for the same and particularly to a field plate technology that is applied to a CMOS component, in which the field plate is formed on a dielectric layer of the CMOS, being arranged above a gate and a drain. An electric field is provided to significantly improve the RF linearity and output power of the CMOS component.
Claims15
A high-linearity and high-power CMOS structure, comprising:
- a CMOS component;
- a field plate formed on the CMOS component;
- the field plate controlling the gate electric field and forming the depletion region in the drain so that the CMOS component increases the RF linearity and the RF output power.
A method of manufacturing a high-linearity and high-power CMOS, comprising the steps of:
- using a Si bulk as a base on which a gate is structured;
- arranging a source and a drain in the base between the two sides of the gate;
- arranging a gate dielectric layer between the gate and the base;
- providing a metallic silicide layer above the source, the drain, and the gate;
- having the gate, the source, and the drain covered with the dielectric layer;
- and
- forming the field plate on the dielectric layer, opposite to the top of gate and drain.
4 more elements
Dependencies are inferred from the claim text.