Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure

A method of operating a memory cell comprising:

• (a) providing a memory cell that includes:
• (i) a silicon semiconductor layer having at least two source/drain regions disposed below the surface of the semiconductor layer and separated by a channel region;
• (ii) a silicon oxide insulating layer disposed above the channel region;
• (iii) a silicon nitride charge storage layer disposed above the silicon oxide insulating layer;
• (iv) an upper insulating multi-layer structure disposed above the charge storage layer, wherein the upper insulating multi-layer structure comprises a silicon oxide layer having a thickness of about 18 to 25 angstroms, and a silicon nitride layer having a thickness of about 40 to 70 angstroms disposed above the silicon oxide layer;
• and
• (v) a gate disposed above the upper insulating multi-layer structure, wherein the gate comprises a p−doped polysilicon layer;
• and
• (b) applying a positive voltage of about 10 to 15 volts to the gate sufficient to cause hole tunneling from the gate toward the charge storage layer.