US 2008/0157101 A1 · TRANSISTOR ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

Abstract

A transistor array substrate includes a first substrate including a pixel region and a transistor region. The pixel region includes a pixel electrode, a portion of a disconnected gate line and a portion of a disconnected data line. The transistor region includes first and second gate connecting portions respectively connected to disconnected portions of the gate line, and first and second data connecting portions respectively connected to disconnected portions of the data line. The transistor array substrate also includes a second substrate including a gate line connecting portion connected to the first and second gate connecting portions, a data line connecting portion connecting the first and second data connecting portions, and a transistor connected to the gate line connecting portion, the data line connecting portion and the pixel electrode. The second substrate is attached to the transistor region of the first substrate.

Claims23

Dependent claims

A transistor array substrate, comprising:

a first substrate comprising a pixel region and a transistor region,
the pixel region including a pixel electrode, a portion of a disconnected gate line and a portion of a disconnected data line, and
the transistor region including first and second gate connecting portions respectively connected to disconnected portions of the gate line, and first and second data connecting portions respectively connected to disconnected portions of the data line;
and
a second substrate comprising:
a gate line connecting portion connected to the first and second gate connecting portions of the first substrate,
a data line connecting portion for connecting the first and second data connecting portions of the first substrate, and
a transistor connected to the gate line connecting portion and the data line connecting portion of the second substrate, and connected to the pixel electrode of the first substrate,
wherein the second substrate is attached to the transistor region of the first substrate.

6 more elements

A method of manufacturing a transistor array substrate, the method comprising:

manufacturing a first substrate, the first substrate comprising a pixel electrode, a portion of a disconnected gate line and a portion of a disconnected data line;
manufacturing a second substrate, the second substrate comprising a gate line connecting portion, a data line connecting portion and a transistor;
and
attaching the second substrate to the first substrate such that the gate line connecting portion connects portions of the disconnected gate line of the first substrate, the data line connecting portion connects portions of the disconnected data line of the first substrate, and the transistor is connected to the pixel electrode of the first substrate.

1 more element

Dependencies are inferred from the claim text.

Transistor array substrate and method of manufacturing the same

Life of this patent

Transistor array substrate and method of manufacturing the same

Life of this patent

Abstract

Claims23