Thin film transistor array substrate and method for fabricating same
AssigneeInnolux Display Corp.
InventorsHung-Yu Chen, Tsau-Hua Hsieh, Jia-Pang Pan
Life of this patent
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Abstract
An exemplary TFT array substrate includes: an insulating substrate (201), a gate line (23) and a repair structure (272) arranged on the insulating substrate, a gate insulating layer (204) covering the gate line and the repair structure; a data line (27) arranged on the gate insulating layer corresponding to the repair structure, which is insulated from the gate line and intersects with the gate line. The repair structure has a gap (274). The gap of the repair structure is located at where the repair structure overlapping to the gate line.
Claims20
A method for fabricating a thin film transistor (TFT) array substrate, the method comprising:
- providing an insulating substrate;
- forming a common electrode on the insulating substrate and a repair structure on the insulating substrate by a first photolithograph process, the repair structure having a plurality of gaps;
- forming a common line, a gate line, and a gate electrode on the insulating substrate by a second photolithograph process, the gate electrode being connected to the gate line;
- forming a gate insulating layer and a semiconductor layer on the gate insulating layer by a third photolithograph process, the semiconductor layer being above the gate electrode;
- and
- forming a data line and source/drain electrodes on the gate insulating layer by a fourth photolithograph process, the data line being above the repair structure and intersecting with the gate line and the common line, wherein the gaps of the repair structure each correspond to an overlap of the gate line and the repair line, or an overlap of the common line and repair line.
A thin film transistor array substrate comprising:
- an insulating substrate;
- a gate line and a repair structure provided on the insulating substrate, the repair structure having a gap;
- a gate insulating layer covering the gate line and the repair structure;
- a data line arranged on the gate insulating layer corresponding to the repair structure, which is insulated from the gate line and intersects with the gate line;
- wherein the gap of the repair structure is located at where the repair structure overlapping the gate line.
Dependencies are inferred from the claim text.