Printed Circuit Analysis Method and Device
AssigneeEdxact
InventorStephane Guedon
Life of this patent
Estimating the term…
Abstract
The invention relates to a simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, comprising: a) the definition of, on one hand, inputs and outputs of circuit networks, and, on the other, internal components of each network, b) the formation of a reduced model of each network; c) the simulation of the network using this reduced model, d) in the event of an unsatisfactory simulation result, the modification of one or more networks, the formation of a second reduced model, and the simulation with said new reduced model, e) in the event of a satisfactory simulation result, the production of the circuit.
Claims36
Simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, comprising:
- a) the definition of, on one hand, inputs and outputs of circuit networks, and, on the other, internal components of each network,
- b) the formation of a reduced model of each network comprising:
- b1)•the formation of a conductance or resistance matrix, along with a capacitance, or susceptance, or susceptance and inductance, or susceptance, inductance and reluctance matrix of these inputs and internal components of the network,
- b2)•the reduction of the conductance or resistance matrix of the internal components, along with the capacitance, or susceptance, or susceptance and inductance, or susceptance, inductance and reluctance matrix of said internal components,
- c) the simulation of the network using this reduced, digital model,
- d) in the event of an unsatisfactory simulation result, the modification of part of the masks and/or connections of one or more networks, the formation of a second reduced model, and the simulation with said new reduced model,
- e) in the event of a satisfactory simulation result, the production of the circuit.
Simulation device of an electronic circuit, represented in the form of masks and connections, comprising:
- a) means to define, on one hand, inputs and outputs of networks of the circuit, and, on the other, the internal components of said networks,
- b) means to form or calculate a reduced model of each network, comprising:
- b1)•means to form or calculate a conductance or resistance matrix of the internal components, along with a capacitance, or susceptance, or susceptance and inductance, or susceptance, inductance and reluctance matrix of these inputs and internal components of the network,
- b2)•means to reduce the conductance or resistance matrix of the internal components, along with the capacitance or susceptance or susceptance and inductance or susceptance, inductance and reluctance matrix of said internal components,
- c) means to simulate the circuit using this reduced model,
- d) in the event of an unsatisfactory simulation result, means to modify part of the masks and/or connections of one or more networks, to form a second reduced model, and to perform a simulation with said new reduced model.
Dependencies are inferred from the claim text.