Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorHaruki TODA
Life of this patent
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Abstract
A semiconductor memory device including an error detecting and correcting system, wherein the error detecting and correcting system includes a 3EC system configured to be able to detect and correct 3-bit errors, and wherein the 3EC system is configured to search errors in such a manner that 3-degree error searching equation is divided into a first part containing only unknown numbers and a second part calculative with syndromes via variable transformation by use of two or more parameters, and previously nominated solution indexes collected in a table and syndrome indexes are compared to each other.
Claims14
A semiconductor memory device comprising an error detecting and correcting system, wherein
- the error detecting and correcting system includes a 3EC system configured to be able to detect and correct 3-bit errors, and wherein
- the 3EC system is configured to search errors in such a manner that 3-degree error searching equation is divided into a first part containing only unknown numbers and a second part calculative with syndromes via variable transformation by use of two or more parameters, and previously nominated solution indexes collected in a table and syndrome indexes are compared to each other.
A semiconductor memory device comprising an error detecting and correcting system for detecting and correcting an error bit of read out data with a BCH code, wherein
- the error detecting and correcting system includes:
- a 3EC system and a 2EC system configured to be able to detect and correct 3-bit errors and up to 2-bit errors, respectively, solution results of the 3EC system and 2EC system being exchanged in accordance with an error situation;
- and
- a warning signal generating circuit configured to generate a warning signal designating that there are 4-bit or more errors in case syndromes are not in an all “0” state, and in case no error location is searched with whichever of the 3EC system and 2EC system.
Dependencies are inferred from the claim text.