Loading patent…
AssigneePanasonic Corporation
InventorsDaisaku Ikoma, Kyoji Yamashita, Yasuyuki Sahara, Katsuhiro Ootani, Tomoyuki Ishizu
Estimating the term…
A circuit simulation apparatus has a means to acquire data regarding a transistor, a model parameter generation unit for generating a model parameter representing effects of stress upon the transistor active region caused by the isolation region, and a simulation execution unit for evaluating characteristics of the transistor using a simulation program associated with the model parameter. The model parameter includes a term regarding width of the transistor active region, a term regarding width of the peripheral active region, and a term regarding width between the transistor active region and the peripheral active region.
A circuit simulation method for an integrated circuit, the integrated circuit including active regions isolated from each other by an isolation region, the active regions including a transistor active region having a gate electrode of a transistor formed thereon and at least one peripheral active region arranged around the transistor active region, the method comprising:
An apparatus for simulating an integrated circuit, the integrated circuit including active regions isolated from each other by an isolation region, the active regions including a transistor active region having a gate electrode of a transistor formed thereon and at least one peripheral active region arranged around the transistor active region, the apparatus comprising:
Dependencies are inferred from the claim text.