US 2008/0077349 A1 · SEMICONDUCTOR TESTING DEVICE

Abstract

A semiconductor testing device includes: a data memory which stores a test program, said test program generating a test command for testing a plurality of functions within one function area of a plurality of function areas of a semiconductor device, said test command being generated for said function area; a first area generation part which generates first data, said first data identifying one function area of said plurality of function areas, said plurality of functions of said one function area being tested; a main control part which generates said test command based on said test program and said first data and transmits said test command to said semiconductor device; a second area generation part which receives a first result, said first result being returned from said semiconductor device based on a first test in accordance with said test command and generates a second result based on said first result, said second result showing a pass or failure of said first test corresponding to said function area; and a third area generation part which generates second data based on said second result and transmits said second data to said first area generation part, said first area generation part generating third data based on said second data, said third data identifying one or more of said plurality of function areas, said one or more of said plurality of function areas being the object of a second test subsequent to said first test.

Claims20

Dependent claims

A semiconductor testing device comprising:

a data memory which stores a test program, said test program generating one or more of test commands, each of said one or more of test commands instructing a test of a plurality of functions, said plurality of functions being included in one function area of a plurality of function areas of a semiconductor device;
a first area generation part which generates first data, said first data identifying one or more of function areas of said plurality of function areas;
a main control part which generates said one or more of test commands based on said test program and said first data and transmits said one or more of test commands to said semiconductor device;
a second area generation part which receives a first result, said first result being returned from said semiconductor device based on one or more of first tests, each of said one or more of first tests having been instructed by each of said one or more of test commands, said second area generation part generating one or more of second results based on said first result, each of said one or more of second results showing a pass or failure of each of said one or more of first tests;
and
a third area generation part which transmits said one or more of second results to said first area generation part, said first area generation part generating second data based on said second result, said second data identifying one or more of said plurality of function areas, a plurality of functions of each of said one or more of said plurality of function areas being the object of second tests subsequent to said first tests.

3 more elements

A method for testing a semiconductor device comprising:

storing a test program, said test program generating one or more of test commands, each of said one or more of test commands instructing a test of a plurality of functions, said plurality of functions being included in one function area of a plurality of function areas of a semiconductor device;
generating first data, said first data identifying one or more of function areas of said plurality of function areas;
generating said one or more of test commands based on said test program and said first data and transmits said one or more of test commands to said semiconductor device;
receiving a first result, said first result being returned from said semiconductor device based on one or more of first tests, each of said one or more of first tests having been instructed by each of said one or more of test commands;
generating one or more of second results based on said first result, each of said one or more of second results showing a pass or failure of each of said one or more of first tests;
and
generating second data based on said second result, said second data identifying one or more of said plurality of function areas, a plurality of functions of each of said one or more of said plurality of function areas being the object of second tests subsequent to said first tests.

4 more elements

A computer program product having a set of executable instruction codes stored on a computer readable medium for controlling a semiconductor testing device, comprising:

storing a test program, said test program generating one or more of test commands, each of said one or more of test commands instructing a test of a plurality of functions, said plurality of functions being included in one function area of a plurality of function areas of a semiconductor device;
generating first data, said first data identifying one or more of function areas of said plurality of function areas;
generating said one or more of test commands based on said test program and said first data and transmits said one or more of test commands to said semiconductor device;
receiving a first result, said first result being returned from said semiconductor device based on one or more of first tests, each of said one or more of first tests having been instructed by each of said one or more of test commands;
generating one or more of second results based on said first result, each of said one or more of second results showing a pass or failure of each of said one or more of first tests;
and
generating second data based on said second result, said second data identifying one or more of said plurality of function areas, a plurality of functions of each of said one or more of said plurality of function areas being the object of second tests subsequent to said first tests.

4 more elements

Dependencies are inferred from the claim text.

Semiconductor testing device

Life of this patent

Semiconductor testing device

Life of this patent

Abstract

Claims20