Manufacturing method of semiconductor device
AssigneeShinko Electric Industries Co., Ltd.
InventorsTakaharu Yamano, Tadashi Arai
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AssigneeShinko Electric Industries Co., Ltd.
InventorsTakaharu Yamano, Tadashi Arai
Estimating the term…
The present invention relates to a manufacturing method of a semiconductor device having a size approximately same as the size of a semiconductor chip when viewed in a plan view, in which the semiconductor chip is flip-chip bonded to a wiring pattern, and an object of the invention is to provide the manufacturing method of a semiconductor device which allows reduction in the number of process steps to realize the minimization of manufacturing cost. An insulating resin 13 is formed so as to cover a plurality of internal connection terminals 12 and a surface of a plurality of semiconductor chips 11 on which the plurality of internal connection terminals are provided, then a metal layer 33 for forming a wiring pattern is formed over the insulating resin 13, and by pressing the metal layer 33, the metal layer 33 and the plurality of internal connection terminals 12 are pressure-bonded.
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
A manufacturing method of a semiconductor device comprising a semiconductor substrate on which a plurality of semiconductor chips are formed, the plurality of semiconductor chips having electrode pads, internal connection terminals provided on the electrode pads and wiring patterns connected to the internal connection terminals,
Dependencies are inferred from the claim text.