Integrated circuit structures for increasing resistance to single event upset

Integrated circuitry for controlling signal-routing pass transistors that are also part of the integrated circuitry comprising:

• first and second PMOS transistors;
• first and second NMOS transistors, each of which is connected in series with a respective one of the PMOS transistors between a source of relatively high potential and a source of relatively low potential;
• an output node connected in series between the second PMOS transistor and the second NMOS transistor, the output node also being connected to gate circuitry of the first PMOS transistor, the first NMOS transistor, and the pass transistors;
• and
• an input node connected in series between the first PMOS transistor and the first NMOS transistor, the input node also being connected to gate circuitry of the second PMOS transistor and the second NMOS transistor, the gate circuitry of at least one of the second PMOS and second NMOS transistors including a portion that is enlarged to increase capacitance of the input node.