Vertical electromechanical memory devices and methods of manufacturing the same

A method of forming a memory device comprising:

• providing a first electrode extending in a vertical direction relative to a substrate;
• providing a second electrode extending in a vertical direction relative to the substrate, the second electrode being spaced apart from the first electrode by a vertical gap;
• and
• providing a third electrode extending in a vertical direction in the electrode gap, the third electrode being spaced apart from the first electrode by a first gap and the third electrode being spaced apart from the second electrode by a second gap, the third electrode being elastically deformable such that the third electrode deflects to be electrically coupled with the first electrode through the first gap in a first bent position and to be electrically coupled with the second electrode through the second gap in a second bent position, and to be isolated from the first electrode and the second electrode in a rest position.

A method of forming a memory device comprising:

• providing a first electrode and a second electrode on a substrate, the first and second electrodes being spaced apart by a gap;
• providing a sacrificial layer in the gap;
• providing a third electrode on the sacrificial layer in the gap, the third electrode being spaced apart from the first and second electrodes by the sacrificial layer;
• and
• removing the sacrificial layer to form a first gap between the third electrode and the first electrode and to form a second gap between the third electrode and the second electrode.

A stacked memory device comprising:

• a first device layer including an array of transistor devices;
• and
• a second device layer including an array of memory cells, the first and second device layers being vertically arranged with respect to each other,
• wherein the memory cells of the first array each include:
• a first electrode extending in a vertical direction relative to a substrate;
• a second electrode extending in a vertical direction relative to the substrate, the second electrode being spaced apart from the first electrode by a vertical gap;
• and
• a third electrode extending in a vertical direction in the electrode gap, the third electrode being spaced apart from the first electrode by a first gap and the third electrode being spaced apart from the second electrode by a second gap, the third electrode being elastically deformable such that the third electrode deflects to be electrically coupled with the first electrode through the first gap in a first bent position and to be electrically coupled with the second electrode through the second gap in a second bent position, and to be isolated from the first electrode and the second electrode in a rest position.

A non-volatile memory device comprising:

• a substrate;
• a first charge trapping structure on the substrate;
• a first electrode on the first charge trapping structure extending in a vertical direction relative to the substrate;
• a second electrode extending in a vertical direction relative to the substrate, the second electrode being spaced apart from the first electrode by a vertical gap;
• and
• a third electrode extending in a vertical direction in the electrode gap, the third electrode being spaced apart from the first electrode by a first gap and the third electrode being spaced apart from the second electrode by a second gap, the third electrode being elastically deformable such that the third electrode deflects to be electrically coupled with the first electrode through the first gap in a first bent position and to be electrically coupled with the second electrode through the second gap in a second bent position, and to be isolated from the first electrode and the second electrode in a rest position.

A memory device comprising:

• a plurality of memory devices, each memory device comprising:
• a write electrode extending in a vertical direction relative to the substrate;
• a read electrode extending in a vertical direction relative to the substrate, the read electrode being spaced apart from the write electrode by a vertical gap;
• and
• a transition electrode extending in a vertical direction in the electrode gap, the transition electrode being spaced apart from the write electrode by a first gap and the transition electrode being spaced apart from the read electrode by a second gap, the transition electrode being elastically deformable such that the transition electrode deflects to be electrically coupled with the write electrode through the first gap in a first bent position and to be electrically coupled with the read electrode through the second gap in a second bent position, and to be isolated from the write electrode and the read electrode in a rest position;
• the plurality of memory devices being arranged in an array along multiple rows in a row direction and along multiple columns in a column direction on the substrate;
• a plurality of bit lines, each bit line extending in the column direction on the substrate, the transition electrodes of the memory devices of a same column being coupled to a same one of the bit lines;
• a plurality of write word lines, each write word line extending in the row direction on the substrate, the write electrodes of the memory devices of a same row being coupled to a same one of the write word lines;
• and
• a plurality of read word lines, each read word line extending in the row direction on the substrate, the read electrodes of the memory devices of a same row being coupled to a same one of the read word lines.