US 2008/0003811 A1 · METHOD FOR FABRICATING STORAGE NODE CONTACT IN SEMICONDUCTOR DEVICE

Abstract

A method for fabricating a storage node contact in a semiconductor device includes forming a landing plug over a substrate, forming a first insulation layer over the landing plug, forming a bit line pattern over the first insulation layer, forming a second insulation layer over the bit line pattern, forming a mask pattern for forming a storage node contact over the second insulation layer, etching the second and first insulation layers until the landing plug is exposed to form a storage node contact hole including a portion having a rounded profile, filling a conductive material in the storage node contact hole to form a contact plug, and forming a storage node over the contact plug.

Claims13

Dependent claims

A method for fabricating a storage node contact in a semiconductor device, the method comprising:

forming a landing plug over a substrate;
forming a first insulation layer over the landing plug;
forming a bit line pattern over the first insulation layer;
forming a second insulation layer over the bit line pattern;
forming a mask pattern for forming a storage node contact over the second insulation layer;
etching the second and first insulation layers until the landing plug is exposed to form a storage node contact hole including a portion having a rounded profile;
filling a conductive material in the storage node contact hole to form a contact plug;
and
forming a storage node over the contact plug.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application

11/761,577Filed 12 Jun 2007

Priority

KR 2006-006005630 Jun 2006

Published

3 Jan 2008

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
H10B 12/0335
The capacitor extending over the transistor: making a connection between the transistor and the capacitor, e.g. plug
H10W 20/082
By forming openings in the dielectric parts: the openings being tapered via holes
Y10S 257/906
Active solid-state devices, e.g. transistors, solid-state diodes: dram with capacitor electrodes used for accessing, e.g. bit line is capacitor plate

Method for fabricating storage node contact in semiconductor device

Life of this patent

Method for fabricating storage node contact in semiconductor device

Life of this patent

Abstract

Claims13