Field programmable semiconductor object array integrated circuit

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• an array of core objects disposed within the core region, wherein each core object includes both logic circuitry and communication elements, the core objects operable in combination so as to form an configurable communication fabric by abutting insertion of the core objects into the array;
• and
• at least one periphery block disposed within the periphery region, wherein the periphery block is coupled to at least one of the communication elements of a core object so as to provide a communication connection between the periphery block and the core object.

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• an array of core objects disposed within the core region;
• and
• a plurality of periphery blocks disposed within the periphery region;
• wherein each core object includes both logic circuitry and configurable communication structures arranged so that the core objects together form a configurable communication fabric by abutting placement of the objects in the array;
• and wherein
• at least one of the periphery blocks includes a communication interface structure arranged for connection to said communication structure of at least one of the core objects so as to extend the configurable communication fabric to the periphery block.

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• including an array of core objects disposed in the core region, wherein:
• each core object includes both logic circuitry and means for communicating signals with adjacent core objects in the array;
• and the communicating means in a current core object of the array implements a signal connection between a second core object, positioned adjacent to the current core object, and a third core object, also positioned adjacent to the current core object so as to provide a neighbor connection in which the current core object has no logical involvement.

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• an array of core objects disposed within the core region, wherein each core object includes both logic circuitry and communication elements, the core objects arranged so that the core objects together form an configurable communication fabric by abutting insertion of the core objects into the array;
• and
• at least one periphery block disposed within the periphery region, wherein the periphery block is coupled to at least one of the communication elements of a core object so as to provide a communication connection between the periphery block and the core object;
• and
• wherein each core object includes a scan chain register arranged for receiving external information and a scan chain output for routing the external information to an adjacent object so that a series of core objects together form a serial scan chain.

A method for ensuring deterministic timing in the design of an FPOA having an array of core objects, the timing method comprising:

• providing a common clock signal in or to the FPOA;
• coupling all of the core objects in the array to the common clock signal so that operation of the core objects is synchronized at least within a predefined hop distance among the core objects;
• configuring communication paths between remote objects of the array as required for a given application of the FPOA;
• and
• in configuring said communication paths between said remote objects, configuring each said communication path so as to latch the communication path signals within the predefined hop distance from the source.

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• an array of core objects disposed within the core region;
• wherein each core object includes both logic circuitry and communication elements operable for communicating signals with other core objects in the array;
• and
• wherein the logic circuitry of at least one of the core objects can be selectively switched on and off without affecting the communication elements so that the communication elements remain operable as part of a communications fabric formed by the objects in the array.

A field-programmable, semiconductor integrated circuit device comprising:

• a core region and a periphery region generally surrounding the core region;
• and an array of core objects disposed within the core region;
• and wherein—
• each core object includes both logic circuitry and interface elements for interfacing with other elements of the device;
• the core object interface elements are configurable so as to form a desired communication path between any selected core object in the array and any second core object in the array without modifying the design of the core objects;
• and
• the core object interface elements comply with a predetermined standard physical layout that includes connections that extend to predetermined locations along at least one peripheral edge of the core object so as to implement interface connections to an adjacent core object by physical abutment of the objects without regard to the specific design of the logic circuitry of the core objects.