I/O-based enforcement of multi-level computer operating modes
AssigneeMicrosoft Corporation
InventorsAlexander Frank, William Westerinen, Issac Ahdout
Life of this patent
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Abstract
A computer is architected so that a monitoring and enforcement of an operating policy is carried out at an interface circuit that transmits data between a processor and one or more function blocks. The function blocks may include system memory, a display, a network, a USB port, or a non-volatile memory. Since the interface circuit handles every transaction between the processor and its supported function blocks, the interface circuit is an effective point at which to enforce limited performance modes when the computer's usage is not in compliance with the operating policy.
Claims20
A computer adapted for operation in an unrestricted use mode and a limited function mode comprising:
- a processor;
- a plurality of functional circuits;
- and
- a support circuit coupled to the processor and at least one of the plurality of functional circuits, the support circuit comprising:
- an interface for managing data communication between the processor and the at least one of the plurality of the functional circuits;
- a state function reflecting a compliance status and for sending a signal activating a limited function operating mode;
- and
- an enforcement function for adjusting the interface to impede effective performance of the at least one of the plurality of functional circuits responsive to the signal to activate the limited function operating mode.
A method of limiting the performance of a computer comprising:
- monitoring for a trigger event corresponding to activating a restricted mode of operation;
- selecting a restricted mode of operation of the computer from a set of restricted modes of operation responsive to the trigger event;
- activating the selected restricted mode of operation by limiting an effectiveness of a function at an interface circuit that couples the function to a processor.
A support circuit in a computer for processing signals carrying data between a processor and at least one function block of the computer comprising:
- a plurality of bi-directional busses for sending and receiving data;
- an interface circuit for processing and routing the signals among the plurality of busses;
- an execution environment for monitoring compliance to an operating policy and enforcing the operating policy when the computer is not in compliance with the operating policy.
Dependencies are inferred from the claim text.