Configuring flash memory
AssigneeAtmel Corporation
InventorsMarc Laurent, Frode Pedersen
Life of this patent
Estimating the term…
Abstract
A system for configuring or testing memory may cycle a memory array while substantially concurrently performing other functional testing. In particular implementations, the system may configure, or cycle, a flash memory using a serial interface and test other functional units using the same serial interface substantially concurrently with cycling the flash memory. In some implementations, cycling the flash memory includes erasing and writing to the flash memory in specific patterns in order to dissipate charge that may have accumulated during a fabrication process.
Claims23
A method of testing an integrated circuit that has a serial interface, embedded memory, an embedded memory controller and at least one functional unit, the method comprising:
- receiving, from a serial interface, a first command to cycle an embedded memory of an integrated circuit;
- cycling the embedded memory with an embedded memory controller in response to receiving the first command;
- during the cycling of the embedded memory, receiving a second command from the serial interface to test at least one functional unit of the integrated circuit;
- and
- executing the second command to test the at least one functional unit substantially concurrently with the cycling of the embedded memory.
A method of testing and configuring a device having at least a first integrated circuit and a second integrated circuit, the first integrated circuit having embedded flash memory and an embedded flash memory controller, and the first and second integrated circuits coupled by a serial interface that connects to a device tester that is external to the device, the method comprising:
- receiving from a device tester and via a serial interface a command to configure a flash memory;
- configuring a flash memory with a embedded flash memory controller;
- receiving test commands and test patterns from the device tester and via the serial interface;
- and
- executing the test commands and propagating the test patterns substantially concurrently with configuring the flash memory.
A method of testing an integrated circuit that has an interface, embedded memory, an embedded memory controller and at least one functional unit, the method comprising:
- receiving, from an interface, a first command to cycle an embedded memory of an integrated circuit;
- cycling the embedded memory with an embedded memory controller in response to receiving the first command;
- during the cycling of the embedded memory, receiving a second command from the interface to test at least one functional unit of the integrated circuit;
- and
- executing the second command to test the at least one functional unit substantially concurrently with the cycling of the embedded memory.
Dependencies are inferred from the claim text.