Controlling an accumulation of timing errors in a synchronous system

A method for communicating clock correction data between a plurality of clocked entities using a clock correction unit, comprising:

• converting a plurality of source-native clock correction values to a plurality of scaled source-native clock correction values by multiplying each source-native clock correction value by a factor N1;
• dividing an adjusted source-native clock correction value by a value M1 to produce a standard quotient and a standard remainder, said standard quotient defining a standard clock correction value;
• accumulating a sum comprised of at least one of said scaled source-native clock corrections and said standard remainder produced from said source-native divider, said sum defining said adjusted source-native clock correction value;
• and
• communicating each said standard clock correction value from a first clocked entity to a second clocked entity.

A machine readable storage media, having stored thereon a computer program having a plurality of code sections executable by a machine for causing the machine to perform the steps of:

• converting a plurality of source-native clock correction values to a plurality of scaled source-native clock correction values by multiplying each source-native clock correction value by a factor N1;
• dividing an adjusted source-native clock correction value by a value M1 to produce a standard quotient and a standard remainder, said standard quotient defining a standard clock correction value;
• accumulating a sum comprised of at least one of said scaled source-native clock corrections and said standard remainder produced from said source-native divider, said sum defining said adjusted source-native clock correction value;
• and
• communicating each said standard clock correction value from a first clocked entity to a second clocked entity.