Battery management system chip and data-accessing method of the same
AssigneeNeotec Semiconductor Ltd.
InventorsChang-Yu Ho, Yung-Ming Tsai
Life of this patent
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Abstract
A battery management system includes a flash memory chip having a smart battery management program and a microprocessor. An interface model (I/F module) is installed in the microprocessor as a bridge between the flash chip and the microprocessor. The I/F module includes a data register and an address register as a data buffer and address buffer, respectively, between the CPU and the flash chip. The I/F module also includes a logic control circuit to generate signals for the flash chip to read and program.
Claims9
A battery management system, comprising:
- a flash chip for storing learning programs related to battery management;
- and
- a battery management microprocessor, further including:
- a CPU;
- a ROM for storing application programs related to the battery management;
- and
- a flash I/F module, further including a first multiplexer, a data register, an address register, a plurality of control registers, a control logic circuit and a decoder;
- wherein the CPU communicates with the data register via a device data bus, the CPU transmits addresses to the data register via the device data bus, the CPU retrieves data from the ROM via an instruction data bus, the CPU retrieves instructions of the flash chip from the data register via the instruction data bus, the first multiplexer is used to determine whether the CPU is to retrieve data from the data register or from the ROM, the CPU transmits instruction addresses to either the ROM or the address register via an instruction address bus, the flash chip communicates with the data register via a flash data bus, the address register transmits addresses to predetermined addresses in the flash chip via a flash address bus, and, according to the instruction of the CPU, the decoder generates enable flags to choose part of the control registers to be transmitted to the control logic circuit for further calculation so as to generate control signals for the first multiplexer, the address register, the data register and the flash chip;
- and wherein data to the control registers is transmitted from the device data bus.
The battery management system according to claim. 1, wherein said battery management microprocessor further includes an I/O port for inputting data to write into said flash chip.
Dependencies are inferred from the claim text.