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US 2007/0192627 A1Published application
Semiconductor memory and data access method
AssigneeMegaChips LSI Solutions Inc.
InventorTakashi Oshikiri
Life of this patent
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Abstract
While a semiconductor memory operates in a first operation mode with high security, an encrypted command is inputted and then decoded to acquire the first address information. After the semiconductor memory comes into a second operation mode where the level of security is lower than that of the first operation mode, a command is inputted. Then, the second address information is acquired from the command. A control circuit in the semiconductor memory generates an address of 10 bits by using the first address information as a high-order 4 bits and the second address information as a low-order 6 bits and outputs the address to a memory array. With this operation, it becomes possible to read/write data from/to the memory array.
Claims24
A semiconductor memory, comprising:
- a data memory part;
- a control circuit;
- and
- an input/output circuit,
- wherein said semiconductor memory is a memory which operates, switching between a first operation mode and a second operation mode and said first operation mode ensures higher security for a command than said second operation mode,
- said control circuit comprises
- an operation mode memory part for storing a current operation mode therein, and
- a command discrimination circuit for discriminating a command inputted from the outside through said input/output circuit,
- said command discrimination circuit includes
- a means of deciphering a command by loosening the security for said command inputted in at least said first operation mode,
- a means of acquiring first address information from a command inputted in said first operation mode, and
- a means of acquiring second address information from a command inputted in said second operation mode,
- said control circuit further comprises
- an address information memory part for storing said first address information therein, which is acquired by said command discrimination circuit in said first operation mode, and
- an address generator circuit for generating a specified address from all or part of said second address information acquired by said command discrimination circuit in said second operation mode and all or part of said first address information stored in said address information memory part, and
- said control circuit accesses said data memory part by using said specified address outputted from said address generator circuit.
13 more elements
A semiconductor memory, comprising:
- a data memory part;
- a control circuit;
- and
- an input/output circuit,
- wherein said semiconductor memory is a memory which operates, switching between a first operation mode and a second operation mode and said first operation mode ensures higher security for a command than said second operation mode,
- said control circuit comprises
- an operation mode memory part for storing a current operation mode therein, and
- a command discrimination circuit for discriminating a command inputted from the outside through said input/output circuit,
- said command discrimination circuit includes
- a means of deciphering a command by loosening the security for said command inputted in at least said first operation mode,
- a means of acquiring first address information from a command inputted in said first operation mode, and
- a means of acquiring second address information from a command inputted in said second operation mode,
- said control circuit further comprises
- an address information memory part for storing said first address information therein, which is acquired by said command discrimination circuit in said first operation mode, and
- an address generator circuit for comparing all or part of said second address information acquired by said command discrimination circuit in said second operation mode with all or part of said first address information stored in said address information memory part and generating a specified address from all or part of said second address information only if these coincide with each other, and
- said control circuit accesses said data memory part by using said specified address outputted from said address generator circuit.
13 more elements
A data access method of accessing a data memory part in a semiconductor memory which comprises said data memory part, a control circuit and an input/output circuit,
- wherein said semiconductor memory is a memory which operates, switching between a first operation mode and a second operation mode,
- said method comprising the step of
- a) inputting a command from the outside by using said control circuit in a state where said semiconductor memory operates in said first operation mode with higher security for a command than said second operation mode;
- b) acquiring first address information from a command inputted in said first operation mode by said control circuit;
- c) bringing said semiconductor memory into said second operation mode;
- d) inputting a command from the outside by using said control circuit in a state where said semiconductor memory operates in said second operation mode;
- e) acquiring second address information from a command inputted in said second operation mode by said control circuit;
- f) generating a specified address from all or part of said first address information and all or part of said second address information by using said control circuit;
- and
- g) accessing said data memory part by using said generated specified address by said control circuit.
7 more elements
A data access method of accessing a data memory part in a semiconductor memory which comprises said data memory part, a control circuit and an input/output circuit,
- wherein said semiconductor memory is a memory which operates, switching between a first operation mode and a second operation mode,
- said method comprising the step of
- a) inputting a command from the outside by using said control circuit in a state where said semiconductor memory operates in said first operation mode with higher security for a command than said second operation mode;
- b) acquiring first address information from a command inputted in said first operation mode by said control circuit;
- c) bringing said semiconductor memory into said second operation mode;
- d) inputting a command from the outside by using said control circuit in a state where said semiconductor memory operates in said second operation mode;
- e) acquiring second address information from a command inputted in said second operation mode by said control circuit;
- f) comparing all or part of said first address information with all or part of said second address information by using said control circuit and generating a specified address from all or part of said second address information by using said control circuit only if these coincide with each other;
- and
- g) accessing said data memory part by using said generated specified address by said control circuit.
7 more elements
Dependencies are inferred from the claim text.