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US 2007/0192563 A1Published application
System and method for translating an address associated with a command communicated between a system and memory circuits
AssigneeGoogle Inc.
InventorsSuresh Rajan, Keith Schakel, Michael Smith, David Wang, Frederick Weber
Life of this patent
Estimating the term…
Abstract
A memory circuit system and method are provided. An interface circuit is capable of communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to translate an address associated with a command communicated between the system and the memory circuits.
Claims20
A sub-system, comprising:
- an interface circuit capable of communication with a plurality of memory circuits and a system, the interface circuit operable to translate an address associated with a command communicated between the system and the memory circuits.
A method comprising:
- interfacing a plurality of memory circuits and a system;
- and
- translating an address associated with a command communicated between the system and the memory circuits.
A system, comprising:
- a plurality of memory circuits;
- and
- an interface circuit in communication with the memory circuits, the interface circuit operable to translate an address associated with a command communicated between the system and the memory circuits.
Dependencies are inferred from the claim text.