Low complexity speculative multithreading system based on unmodified microprocessor core

A method for implementing a thread-level speculation system on a chip multiprocessor, comprising

• receiving a thread identifier;
• starting a thread in response to receiving a thread identifier;
• committing the results of speculative thread speculation to at least one private cache adapted to store speculative execution results when a speculative thread becomes non-speculative in response to a logic result indicating a non-violation condition as determined by a logic unit operatively coupled to said chip multiprocessor;
• aborting and discarding the results of speculative thread execution in response to notification that a data dependence violation has occurred in one of:
• a present thread and an older thread in response to a logic result indicating a data dependence violation condition as determined by said logic unit;
• restarting thread execution when a thread has been aborted;
• and
• optionally starting at least a more speculative thread relative to a present thread state.

A computer program product comprising a computer usable medium having a computer usable program code for supporting thread level speculative execution in a computing environment having multiple processing units adapted for concurrent execution of threads in speculative and non-speculative modes, each processing unit having a cache memory hierarchy of caches operatively connected therewith, said computer program product comprising:

• computer readable program code responsive to received notification events indicating detection or non-detection of speculative thread coherence violation conditions, wherein at least one notification event is generated by a local private cache storing speculative memory updates, and tracking a speculative state with reference to memory updates performed by at least one other processing unit;
• and,
• computer readable program code for managing threads at a processing unit in response to a nature of a received notification event, said thread managing including generating request events for starting a speculative thread at said processing unit via a queue component operatively coupled to said processing unit,
• wherein speculative coherence between speculative threads executing in said computing environment is enabled.