Semiconductor device having sufficient process margin and method of forming same
AssigneeSamsung Electronics Co., Ltd.
InventorsMan-Hyoung RYOO, Gi-Sung YEO, Si-Hyeung LEE, Gyu-Chul KIM, Sung-Gon JUNG, Chang-Min PARK, Hoo-Sung CHO
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Abstract
According to some embodiments of the invention, a substrate doped with a P type impurity is provided. An N type impurity is doped into the substrate to divide the substrate into a P type impurity region and an N type impurity region. Active patterns having a first pitch are formed in the P type and N type impurity regions. Gate patterns having a second pitch are formed on the active patterns in a direction substantially perpendicular to the active patterns. Other embodiments are described and claimed.
Claims12
A method of manufacturing a semiconductor device comprising:
- providing a substrate doped with a P type impurity;
- doping an N type impurity into the substrate to divide the substrate into a P type impurity region and an N type impurity region;
- forming active patterns having a first pitch in the P type and N type impurity regions;
- and
- forming gate patterns having a second pitch on the active patterns in a direction substantially perpendicular to the active patterns.
A method of manufacturing an SRAM device comprising:
- doping a substrate with a P type impurity;
- doping an N type impurity into the substrate to divide the substrate into a P type well and an N type well;
- forming active patterns having a first pitch in the P type and N type wells;
- and
- forming gate patterns having a second pitch on the active patterns in a direction substantially perpendicular to the active patterns.
Dependencies are inferred from the claim text.