Method of manufacturing semiconductor device and semiconductor memory device
AssigneeElpida Memory, Inc.
InventorShun Fujimoto
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes: (A) forming a gate electrode of a transistor on a substrate, a top layer of the gate electrode being a first metal film; (B) blanket depositing an interlayer insulating film; and (C) forming a first contact hole contacting the gate electrode and a second contact hole contacting a surface of the substrate. The method further includes: (D) siliciding an exposed surface of the first metal film to form a first silicide at a bottom of the first contact hole; (E) after the (D) process, blanket depositing a second metal film; and (F) after the (E) process, forming a second silicide at a bottom of the second contact hole through a silicide reaction between the second metal film and the surface of the substrate.
Claims11
A method of manufacturing a semiconductor device comprising:
- (A) forming a gate electrode of a transistor on a substrate, wherein a top layer of said gate electrode is a first metal film;
- (B) blanket depositing an interlayer insulating film;
- (C) forming a first contact hole contacting said gate electrode and a second contact hole contacting a surface of said substrate by etching said interlayer insulating film using a mask;
- (D) after said (C) process, siliciding an exposed surface of said first metal film to form a first silicide at a bottom of said first contact hole;
- (E) after said (D) process, blanket depositing a second metal film;
- (F) after said (E) process, forming a second silicide at a bottom of said second contact hole through a silicide reaction between said second metal film and said surface of said substrate;
- and
- (G) after said (F) process, removing said second metal film that is unreacted.
A method of manufacturing a semiconductor memory device comprising:
- (a) forming a select transistor of a memory cell on a substrate, wherein a top layer of a gate electrode of said select transistor is a first metal film;
- (b) forming a contact plug on a diffusion layer of said select transistor;
- (c) blanket depositing an interlayer insulating film;
- (d) forming a first contact hole contacting said gate electrode and a second contact hole contacting said contact plug by etching said interlayer insulating film using a mask;
- (e) after said (d) process, siliciding an exposed surface of said first metal film to form a first silicide at a bottom of said first contact hole;
- (f) after said (e) process, blanket depositing a second metal film;
- (g) after said (f) process, forming a second silicide at a bottom of said second contact hole through a silicide reaction between said second metal film and a surface of said contact plug;
- and
- (h) after said (g) process, removing said second metal film that is unreacted.
Dependencies are inferred from the claim text.