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US 2007/0190741 A1Published application
Strained semiconductor device and method of making same
AssigneeInfineon Technologies AG
InventorRichard Lindsay
Life of this patent
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Abstract
A method of making a semiconductor device is disclosed. An upper surface of a semiconductor body is amorphized and a liner is formed over the amorphized upper surface. The upper surface can then be annealed. A transistor is formed at the upper surface.
Claims38
A method of making a semiconductor device, the method comprising:
- providing a semiconductor body;
- etching an isolation trench in the semiconductor body;
- after etching the isolation trench, amorphizing an upper surface of the semiconductor body;
- forming a liner over the amorphized upper surface;
- annealing the upper surface;
- and
- forming a transistor at the upper surface.
4 more elements
A method of forming a semiconductor device, the method comprising:
- providing a semiconductor body;
- masking a first portion of the semiconductor body so that a second portion of the semiconductor body remains unmasked;
- performing an amorphizing implant so that an upper layer of the second portion of the semiconductor body is amorphized;
- depositing a stress inducing liner over at least the upper layer of the second portion of the semiconductor body;
- annealing the second portion of the semiconductor body;
- removing the stress inducing liner;
- and
- forming a transistor having a current path disposed within the upper layer of the second portion of the semiconductor body.
5 more elements
A method of making a semiconductor device, the method comprising:
- providing a semiconductor body;
- forming an isolation trench in the semiconductor body;
- amorphizing an upper surface of the semiconductor body adjacent the isolation trench;
- depositing a stress-inducing liner over the upper surface of the semiconductor body;
- annealing the upper surface of the semiconductor body such that the upper surface is in a substantially crystalline state;
- removing the stress-inducing liner;
- filling the isolation trench with an insulating material;
- and
- forming an electronic device at the upper surface of the semiconductor body adjacent the isolation trench.
6 more elements
A method of making a semiconductor device, the method comprising:
- providing a semiconductor body;
- forming an isolation trench in the semiconductor body;
- after forming the isolation trench, amorphizing an upper surface of the semiconductor body;
- forming a first stress-inducing liner over a first portion of the upper surface;
- forming a second stress-inducing liner over a second portion of the upper surface;
- annealing the upper surface of the semiconductor body;
- and
- forming a first transistor at the first portion of the upper surface and forming a second transistor at the second portion of the upper surface, the first transistor having a conductivity type opposite that of the second transistor.
5 more elements
A method of making a semiconductor device, the method comprising:
- providing a semiconductor body;
- amorphizing an upper surface of the semiconductor body;
- forming an isolation trench in the semiconductor body after amorphizing the upper surface;
- forming a first stress-inducing liner over a first portion of the upper surface;
- forming a second stress-inducing liner over a second portion of the upper surface;
- filling the isolation trench with an insulating material using a process with a temperature lower than about 600° C.:
- annealing the upper surface of the semiconductor body;
- and
- forming a first transistor at the first portion of the upper surface and forming a second transistor at the second portion of the upper surface, the first transistor having a conductivity type opposite that of the second transistor.
6 more elements
A method of making a semiconductor device, the method comprising:
- providing a semiconductor fin overlying a portion of a substrate;
- amorphizing at least an upper portion of the semiconductor fin;
- forming a stress-inducing liner over the semiconductor fin;
- annealing the semiconductor fin;
- and
- removing the stress-inducing liner.
3 more elements
A semiconductor device comprising:
- a semiconductor body;
- a stress memory transfer layer disposed at an upper surface of the semiconductor body;
- a channel region disposed in the stress memory transfer layer;
- a gate dielectric overlying the channel region;
- a gate electrode overlying the gate dielectric;
- a source region disposed in the semiconductor body;
- and
- a drain region disposed in the semiconductor body and spaced from the source region by the channel region.
5 more elements
Dependencies are inferred from the claim text.