Low resistance gate for power mosfet applications and method of manufacture
AssigneeFairchild Semiconductor Corporation
InventorsSreevatsa Sreekantham, Ihsiu Ho, Fred Session, James Kent Naylor
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Abstract
A trench gate field effect transistor is formed as follows. A trench is formed in a semiconductor region, followed by a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench. A conductive seed layer is formed in a bottom portion of the trench over the dielectric layer. A low resistance material is grown over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
Claims19
A method of forming a trench gate field effect transistor, comprising:
- forming a trench in a semiconductor region;
- forming a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench;
- forming a conductive seed layer in a bottom portion of the trench over the dielectric layer;
- and
- growing a low resistance material over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
A method of forming a shielded gate field effect transistor, comprising:
- forming a trench in a semiconductor region;
- lining lower sidewalls and bottom of the trench with shield dielectric;
- filling a lower portion of the trench with a shield electrode;
- forming an inter-electrode dielectric over the shield electrode;
- forming a dielectric layer lining upper trench sidewalls and extending over mesa regions adjacent the trench;
- forming a conductive seed layer over the inter-electrode dielectric layer;
- and
- growing a low resistance material over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
19-140. (canceled)
Dependencies are inferred from the claim text.