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US 2007/0190718 A1Published application
Dual-damascene process to fabricate thick wire structure
AssigneeInternational Machines Corporation
InventorsDouglas Coolbaugh, Keith Downes, Peter Lindgren, Anthony Stamper
Life of this patent
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Abstract
A method and semiconductor device. In the method, at least one partial via is etched in a stacked structure and a border is formed about the at least one partial via. The method further includes performing thick wiring using selective etching while continuing via etching to at least one etch stop layer.
Claims36
A method, comprising:
- etching at least one partial via in a stacked structure;
- forming a border about the at least one partial via;
- and
- performing thick wiring using selective etching while continuing via etching to at least one etch stop layer.
1 more element
A method of making a dual-damascene copper BEOL structure, comprising:
- forming a partial height via in alignment with at least an underlying metal layer;
- applying a negative photoresist material;
- forming a border in the negative photoresist material proximate the partial height via;
- and
- etching the partial height via to a further depth and selectively etching to form a trough;
- and
- incorporating a MIM capacitor into the BEOL structure.
4 more elements
A dual-damascene method for fabricating a thick wire structure, comprising:
- forming a partial via in a stacked structure;
- depositing negative photoresist on the stacked structure after the formation of the partial via;
- exposing the negative photoresist, remote from the partial via to form a border above the partial via;
- etching the partial via further into the stacked structure;
- and
- selectively etching into the partial via to form a trough, the selective etching being selective to at least one etch stop layer deposited on at least one of an underlying metal layer and MIM having at least an upper plate, a MIM dielectric and a lower plate.
3 more elements
A thick wire structure, comprising:
- a damascene copper wire formed in a first dielectric layer;
- an etch stop layer covering the damascene copper wire;
- a second dielectric layer on the etch stop layer;
- a second etch stop layer on the second dielectric layer;
- a third dielectric layer on the etch stop layer;
- a via approximately 1.5 microns or taller formed through the first, second and third dielectric layer and contacting the damascene copper wire;
- and
- a trough approximately 2 microns or taller formed proximate to the second etch stop and in substantial axial alignment with the via and having a width larger than the via.
5 more elements
A thick wire structure, comprising:
- an underlying wire formed in a FSG (fluorine doped silicate glass) dielectric material;
- a first nitride cap layer covering the underlying wire;
- an interlevel layer formed on the first nitride cap layer;
- a MIM capacitor embedded in a portion of the interlevel layer;
- a MIM etch stop cap layer formed on the MIM capacitor, the MIM etch stop cap layer having a thickness greater than the first nitride cap;
- a second nitride cap layer formed on the interlevel layer;
- an FSG dielectric layer formed on the second nitride cap;
- a via in alignment with at least one of the underlying wire and the MIM capacitor, extending proximate to the MIM nitride cap layer and the first nitride cap layer;
- and
- a trough in substantial axial alignment with the via and having a width larger than the via and extending to the second nitride cap layer.
7 more elements
Dependencies are inferred from the claim text.